Synopsys Certifies A14 EDA Flows With TSMC and Tapes Out 64G UCIe on 2nm and 3nm, With PCIe 7.0 and HBM4 IP on N2P
Synopsys certifies its digital and analog EDA flows on TSMC’s A14 process and completes 64G UCIe IP tape-outs on TSMC’s 2nm and 3nm nodes. The companies also cite PCIe 7.0 and HBM4 IP on N2P as part of their joint work.
The milestones advance design-flow readiness and high-speed interconnect IP across TSMC process nodes, information relevant to chip designers and semiconductor teams.